To execute software data processing instructions, a data processing system typically enables an arithmetic logic unit (ALU). The arithmetic logic unit is generally comprised of a ROM for storing control information, a logic unit to decode the control information, and an execution unit to perform arithmetic operations on a predetermined information value. The execution unit typically performs add and multiply functions on the information value. The execution unit may also shift or otherwise manipulate the information value in a manner determined by a system designer of the data processing system. For example, if the system designer of the data processing system determines that a constant value should be added to each address value for a predetermined operation, a function to generate the constant value is implemented in the execution unit.
In the data processing system, the execution unit generally requires a large amount of circuit area. For each arithmetic or constant generation operation, a predetermined data path must be defined and dedicated solely for the execution of the operation. As an example, for the execution unit to perform an arithmetic right shift by four operation, at least four data paths must be dedicated for that use. Similarly, to accomplish an arithmetic left shift by eight, at least eight data paths must be defined. A plurality of dedicated data paths must also be implemented for the generation of constant values by the execution unit.
The arithmetic operations performed by the execution unit must generally be accomplished as quickly as possible. Therefore, in a semiconductor data processing device, each of the data paths defined in the execution unit must be implemented in metal, the best conductor. However, the area required to implement all of the dedicated data paths in metal often comprises a major portion of the data processing system circuitry area. Therefore, other portions of logic circuitry outside the execution unit which also increase the performance of the system are often removed as a compromise to compensate for the circuit area required by the execution unit.
In data processing systems in which the circuit area is limited, the system designer must provide a design which provides maximum performance of the data processing system and quick operation of the execution unit. The compromise between performance of the data processing system and the quick operation of the execution unit often results in a less efficient and less powerful data processing system.